[招聘]北京铿腾cadence电子科技有限公司-新增六项职位
=== 招聘信息 === <br>
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公司名称:北京铿腾cadence电子科技有限公司<br><br>
招聘职位(一):Sr.AMS Simulator Verfication <br>Technique Stuff[急聘] <br>
截至日期:2006-3-16 <br>
最低学历:硕士 <br>
招聘人数:[1]人 <br>
工作地点: 北京 <br><br>
简历投递与岗位查询处: <br>
<a target=_blank href="http://www.jobmm.com/cadence/Kuntai_job.asp">http://www.jobmm.com/cadence/Kuntai_job.asp</a><br>
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岗位描述: <br>
Job Responsibilities <br>
- Involved in the verification and validation of <br>the analog and analog mixed signal simulators.<br>
- Participate in the discussions with R&D team as <br>the quality advocate to improve the quality of <br>Simulation's products. <br>
- Write and execute test specifications and test <br>plans.<br><br>
相关要求: <br>
Job Requirements <br>
- Must be a fast learner, and have a strong drive <br>to find bugs in software products. <br>
- Must be independent and must be able to work on <br>multiple projects at a time. <br>
- Must have RF design experience or knowledge. <br>
- Must have Analog/Digital/Mixed Signal design <br>experiences. <br>
- Coding experience with C/C++ under Linux or UNIX <br>preferred. <br>
- Matlab experience preferred. <br>
- Strong knowledge of spice/spectre netlist <br>preferred. <br>
- Knowledge of verilog/ahdl simulator preferred. <br>
- Experience on product quality testing a plus. <br>GUI based testing experience a plus. <br>
- Bachelor CS/EE + 2 years or MS + 1 year <br>experience in EDA and/or SQA industry. <br><br>
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招聘职位(二):Sr.Technique Stuff for Verilog<br>-A Simulator Devlp.[急聘] <br>
截至日期:2006-3-16 <br>
最低学历:硕士 <br>
招聘人数:[1]人 <br>
工作地点: 北京 <br>
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简历投递与岗位查询处: <br>
<a target=_blank href="http://www.jobmm.com/cadence/Kuntai_job.asp">http://www.jobmm.com/cadence/Kuntai_job.asp</a> <br>
<br>
岗位描述: <br>
Job Responsibilities <br>
- Develop, enhance and maintain Verilog-A simulator.<br><br>
相关要求: <br>
Job Requirements <br>
- Familiar with Spice, Verilog-A, Verilog-AMS language. <br>
- Skilled in C++ programming, familiar with development <br>under Linux/Unix environment. <br>
- Analog circuit or digital simulator development <br>experiences. Well understanding on circuit simulation <br>technology, including MNA, dc, tran method. <br>
- Good mathmatic background & knowledge. <br>
- Be familiar with Analog design is a plus. <br>
- EE or CS Master degree with at least 2 years related <br>working experience or above. <br><br>
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招聘职位(三):Member of Technique Stuff for <br>AMS Simulator Develo[急聘] <br>
截至日期:2006-3-9 <br>
最低学历:硕士 <br>
招聘人数:[1]人 <br>
工作地点: 北京 <br>
<br>
简历投递与岗位查询处: <br>
<a target=_blank href="http://www.jobmm.com/cadence/Kuntai_job.asp">http://www.jobmm.com/cadence/Kuntai_job.asp</a> <br>
<br>
岗位描述: <br>
Job Responsibilities <br>
- Develop, enhance and maintain mixed signal <br>circuit simulator which support Verilog-A, <br>Verilog-AMS, VHDL-AMS in spice netlist, <br>with some direction from manager or senior <br>engineers.<br><br>
相关要求: <br>
Job Requirements <br>
- Familiar with Spice, Verilog, Verilog-A, <br>Verilog-AMS, VHDL-AMS language. <br>
- Analog circuit or digital simulator development <br>experiences. <br>
- Skilled in C++ programming, familiar with <br>development under Linux/Unix environment. <br>
- Be familiar with Analog Mixed-signal design <br>is a plus. <br>
- EE or C